VARI 2017 is the 8th European Workshop on CMOS Variability. The increasing variability in CMOS transistor characteristics, as well as its sensitivity to environmental variations has become a major challenge to scaling and integration. This leads to major changes in the way that future integrated circuits and systems are designed. b links must be established between circuit design, system design and device technology. VARI meeting answers to the need to have a European event on variability in CMOS circuits and technologies, where industry and academia meet to discuss and investigate the CMOS process and environmental variability issues in methodologies and tools for the design of current and upcoming generations of integrated circuits and systems. The technical program will focus on performance and power consumption as well as architectural aspects like adaptability or resilience, with particular emphasis on modeling, design, characterization, analysis and optimization of variability. Digital, Analog, Mixed Signal and RF circuits are within VARI scope.
This year VARI will be included in PATMOS technical program as a Special Session. For paper submission in VARI workshop you have to use the PATMOS 2017 submission platform.
Same important dates like PATMOS.
Submission deadline (Regular Papers):
May 8, 2017 May 29, 2017
Submission deadline (Special Sessions):
May 15, 2017 May 29, 2017
Notification of acceptance:
June 26, 2017 July 3, 2017
Camera-ready papers due:
July 24, 2017